Inside Macintosh: PowerPC Numerics / Part 3 - Appendixes

Appendix F - PowerPC Assembly-Language Numerics Reference

Floating-Point Status and Control Register

Table F-2 Bit assignments for FPSCR fields

FPSCR field	Bit	Meaning if set
0	0	Exception summary
	1	Exception enable summary
	2	Invalid-operation exception summary
	3	Overflow exception
1	4	Underflow exception
	5	Divide-by-zero exception
	6	Inexact exception
	7	Invalid-operation exception; signaling NaN as input
2	8	Invalid-operation exception; $$ +-
	9	Invalid-operation exception; $$ /
	10	Invalid-operation exception; $0/0$
	11	Invalid-operation exception; $0\times$
3	12	Invalid-operation exception; comparison operation
	13	Fraction field rounded
	14	Fraction field inexact
	15	Class descriptor
4	16	< or < 0
	17	> or > 0
	18	= or = 0
	19	Unordered or NaN
5	20	Reserved
	21	Invalid-operation exception; software request (not implemented in MPC601)
	22	Invalid-operation exception; square root (not implemented in MPC601)
	23	Invalid-operation exception; convert-to-integer operation
6	24	Invalid-operation exception enable/disable
	25	Overflow exception enable/disable
	26	Underflow exception enable/disable
	27	Divide-by-zero exception enable/disable
7	28	Inexact exception enable/disable
	29	Reserved
	30	Rounding direction
	31	Rounding direction

Table F-3 Rounding direction bits in the FPSCR

Modes	Bits
	30	31
To-nearest	0	0
Upward	1	0
Downward	1	1
Toward-zero	0	1

Table F-4 Class and sign inquiry bits in the FPSCR

Class/sign	Bits
	15	16	17	18	19
+0	0	0	0	1	0
$-0$	1	0	0	1	0
Positive normalized number	0	0	1	0	0
Negative normalized number	0	1	0	0	0
Positive denormalized number	1	0	1	0	0
Negative denormalized number	1	1	0	0	0
+	0	0	1	0	1
$-$	0	1	0	0	1
Quiet NaN	1	0	0	0	1